Senior Design Engineer Embedded
ZatNav Pvt. Ltd.
Total des années d'expérience :3 years, 0 Mois
• Develop a CAN Bus project which get the data from VDO Sensors and send it to the Display through
Arduino mega 2560.
• Working on an R&D project, design on FPGA for
command and control.
• Communication between PS (Processing System)
and PL(Programmable Logic) through AXI
protocols.
• Working on a FPGA Based UAV Project
• Working on developing FPGA-based solutions
• Design a tester for Motherboard in FPGA spartan 6.
• In Self-Test, it checks all the connection pins are
functioning properly.
•In a Short Test, it checks the pin's connectivity.
• Implement Cyclic Redundancy Check (CRC_16)
checks the error in Communication (UART
Protocol) between GUI to FPGA
• Motherboard has 5K connection.
• Also experience AXI Interface.
• Use different debugging tools i.e. Logic analyzer,
oscilloscope
• The Universal Asynchronous Receiver Transmitter
(UART) communication protocol and
Implementation on FPGA.
• Design different FPGA's based projects on ISE and
VIVADO